1. Field of the Invention
This invention relates to a nonvolatile storage device and a method for manufacturing the same.
2. Background Art
Nonvolatile memory typified by NAND flash memory is used widely for large-capacity data storage in mobile telephones, digital still cameras, USB memory, silicon audio, and the like. The market continues to grow due to the reduction of manufacturing costs per bit enabled by rapid miniaturization. However, NAND flash memory utilizes a transistor operation that records information using a threshold shift. It is considered that further improvements to uniformity of characteristics, reliability, high-speed operations, and integration will reach a limit. The development of a new nonvolatile memory is desirable.
On the other hand, for example, phase change memory elements and resistance change elements operate by utilizing a variable resistance state of a resistive material. Therefore, a transistor operation is unnecessary during writing/erasing, and the element characteristics improve as the size of the resistive material is reduced. Hence, this technology is expected to respond to future needs by realizing highly uniform characteristics, high reliability, high-speed operations, and high density.
However, phase change memory elements and resistance change elements are different than NAND flash memory in that independent control of word lines and bit lines is necessary. The number of contacts and wirings connecting to the peripheral circuit undesirably increases as the number of laminated memory layers increases. Therefore, the draw-out to the peripheral circuit is, unfortunately, extremely difficult in the case where the number of laminations is increased.
JP-A 2004-186553 (Kokai) discusses technology to read stored data at high speeds and stabilize operations by providing a selection element including a MOSFET or a diode element that performs a common selection of a plurality of variable resistance elements in a memory cell array formed by variable resistance elements. However, consideration is not given to laminated memory layers, and conventional art does not easily enable a draw-out to the peripheral circuit in a nonvolatile storage device that includes laminated memory layers.